High-speed high-precision analog rank order filter in CMOS technology | IEEE Conference Publication | IEEE Xplore

High-speed high-precision analog rank order filter in CMOS technology


Abstract:

A new scheme for analog rank order filtering based on analog buffers is presented. This scheme is characterized by high-speed, high-precision and simple circuit architect...Show More

Abstract:

A new scheme for analog rank order filtering based on analog buffers is presented. This scheme is characterized by high-speed, high-precision and simple circuit architectures. The overall architecture exhibits linear complexity with number of inputs (O(n)) at the rate of one buffer per input. Rank is easily programmable with tail current source for all rank order values from the max to the min case and its precision does not depend on the accuracy of the current copy. Simulation results are presented that verify functionality and accuracy of the proposed circuit.
Date of Conference: 23-26 May 2004
Date Added to IEEE Xplore: 03 September 2004
Print ISBN:0-7803-8251-X
Conference Location: Vancouver, BC, Canada

Contact IEEE to Subscribe

References

References is not available for this document.