In this paper we present a new methodology of field programmable analog arrays (FPAA) consisting of digitally configurable continuous-time analog blocks (CAB). An array topology of 17 G/sub M/-C CABs connected through a hexagonal interconnect network will be introduced and shown to be able to present any circuit imaginable with the given number of G/sub M/-C cells, i.e. high-, low-, bandpass-filter with adjustable poles, phase shifter, etc. A design example for a 0.25/spl mu/ CMOS-process will show the feasibility of this structure for unity-gain frequencies up to 200MHz.