In this paper, we propose a sampling process for low voltage (1.1V) power-critical low-distortion digital class D amplifiers. The sampling process combines first and second-order Lagrange interpolation techniques to effectively increase the sampling rate without the usual overheads. The computation is also simple. The complete class D amplifier features a very low power dissipation (58.8/spl mu/W), low total harmonic distortion (-85.6dB FS) and high signal-to-noise ratio (99dB FS). The power saving is /spl sim/21% and the THD is improved by 9.8dB FS compared to a design embodying only a first order sampling process. We also provide an analysis of the power dissipation of the load power.