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A power-aware ME architecture using subsample algorithm | IEEE Conference Publication | IEEE Xplore

A power-aware ME architecture using subsample algorithm


Abstract:

This paper presents a power-aware architecture driven by a content-based subsample algorithm which allows the architecture to work at different power consumption modes wi...Show More

Abstract:

This paper presents a power-aware architecture driven by a content-based subsample algorithm which allows the architecture to work at different power consumption modes with acceptable and smooth quality degradation. The proposed algorithm first performs the edge extraction to generate a turn-off mask which is used to reduce the switch activities of processing elements (PEs) in the semi-systolic array. Since we introduce an adaptive control mechanism to set the threshold value of edge determination, based on the video content and the remaining capacity of battery pack, the reduction of switch activities is rather stationary at a certain power consumption mode. As shown in simulation results, the architecture can dynamically operate at different power consumption modes with little quality degradation while the power overhead of edge extraction is under 0.8% comparing with the general subsample algorithm.
Date of Conference: 23-26 May 2004
Date Added to IEEE Xplore: 03 September 2004
Print ISBN:0-7803-8251-X
Conference Location: Vancouver, BC, Canada

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