A new approach for obtaining the optimum coefficients of a switched capacitor delta-sigma (SC /spl Delta//spl Sigma/) modulator for multi-standard GSM/UMTS applications using power and maximum capacitor spread constraints is developed. A modulator with 89dB/60dB DR and 4.5mW/7mW power consumption at 0.2MHz/2MHz bandwidth of GSM/UMTS standards has been designed in a 0.18/spl mu/m, 1.8V 1P6M CMOS process to be used in the baseband of a low-IF (LIF)/zero-IF (ZIF) receiver architecture. The maximum SNDR of the modulator in the presence of 1% mismatch between coefficients degrades less than 1dB.