A PLL with a mixed mode loop filter is designed to suppress the need for a large size capacitor in an analog clock/data recovery circuit and eliminates the need for a high resolution digital controlled oscillator (DCO) in a digital clock recovery circuit. The value of the capacitor in the mixed mode loop filter is 1/4 to 1/256 of that of a conventional loop filter and frequency quantization errors are smaller than that of a 16 bit DCO. The design was verified in the read channel of a digital versatile disc system at 478 Mbps and in the partial-response maximum-likelihood (PRML) detectors for a Blu-ray disc system at 264 Mbps.