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Designing and packaging technology of Renesas SIP | IEEE Conference Publication | IEEE Xplore

Designing and packaging technology of Renesas SIP


Abstract:

Renesas Technology Corp. started an SIP (solution integrated product) Project in April 1999, aiming at the promotion of the SiP (system in package) business. SiP can achi...Show More

Abstract:

Renesas Technology Corp. started an SIP (solution integrated product) Project in April 1999, aiming at the promotion of the SiP (system in package) business. SiP can achieve 1/10-1/6 design TAT (turn around time) in comparison with SoC (system on chip). SiP, which packs a few chips in a single package, has also advantages of EMI noise reduction and customer's substrate area reduction by using signal integrity analysis technology and packaging technology of a planar and a stack structure. On the basis of these technologies, we can enlarge SIP for the digital consumer field, analog included digital field, and other fields.
Date of Conference: 23-26 May 2005
Date Added to IEEE Xplore: 25 July 2005
Print ISBN:0-7803-8834-8

ISSN Information:

Conference Location: Kobe

References

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