In this paper, we present an effective mismatch compensation method for analog current mode processing. Such a method is required in current and future mixed-mode processing systems, which take advantage of analog processing in addition to conventional digital logic. The proposed design utilizes analog processing devices that can be scaled down with the manufacturing process, therefore employing the advantages of CMOS technology in the form of a smaller implementation area. The range of input currents employed is 1 /spl mu/A to 10 /spl mu/A. The example circuit can be calibrated within 1 % of the nominal value at the 4/spl sigma/ confidence interval with 65 /spl mu/m/sup 2/ of implementation area in 0.15/spl mu/m CMOS technology.