In this paper, a method to reduce the power consumption of low-power multipliers is proposed. A decision logic module decides about complementing the input before sending it to the multiplier core. The decision is based on minimizing the switching activity and hence the power consumption. The decision logic proposed in this work, unlike the conventional dynamic decision logic modules, uses a small look up table to make its decisions statically once for all the possible combinations on new input and old input. This feature has lead to the reduction of the power, delay, and complexity of the logic compared to its predecessors while the power saving is negligibly reduced