A new current-mode incremental signaling scheme for high-speed parallel links is proposed. The signaling scheme requires only N+1 physical paths for N parallel bits. It possesses the intrinsic advantages of current-mode signaling including high data rates, large signal swing, low switching noise injection, and superior signal integrity. The current-integrating front-end offers the key advantages of a low and tunable input impedance for channel termination, large bandwidth, and effective suppression of high-frequency noise coupled to the channels. Simulation results of a 4-bit parallel link implemented in a 0.13 mum, 1.2V CMOS technology demonstrate that the proposed signaling scheme is capable of transmitting parallel data at 10 Gbps