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A new area-efficient 4-PAM 10 Gb/s CMOS serial link transmitter | IEEE Conference Publication | IEEE Xplore

A new area-efficient 4-PAM 10 Gb/s CMOS serial link transmitter


Abstract:

A new area efficient CMOS current-mode 4-PAM 10 Gb/s serial link transmitter is presented. The pre-emphasis of the proposed transmitter is realized by employing a delay b...Show More

Abstract:

A new area efficient CMOS current-mode 4-PAM 10 Gb/s serial link transmitter is presented. The pre-emphasis of the proposed transmitter is realized by employing a delay block for each pre-emphasis tap such that the degree of each pre-emphasis tap can be tuned individually and independent of the current symbol. The multiplexing-at-input approach of the serializer ensures that the transistors of the multiplexing branches are minimum sized. A differential output current is obtained from a class AB pre-amplifier and a push-pull configured current-symbol driver and pre-emphasis drivers. The proposed transmitter minimizes the noise injected to the power and ground rails by drawing a constant current from the power supply and electromagnetic interference exerted from the channel to neighboring devices by conveying an output current of the same amplitude but opposite polarities to the channel. Implemented in a 1.2V 0.13/spl mu/m CMOS technology, the transmitter outputs a 3.5 mA peak-to-peak differential output current to the channel, consumes 19.2 mW DC power with inverter buffer chain. The current received at the far end of a 10-cm FR-4 cable has eye-width of 185 ps and eye-height of 1.21 mA.
Date of Conference: 21-24 May 2006
Date Added to IEEE Xplore: 11 September 2006
Print ISBN:0-7803-9389-9

ISSN Information:

Conference Location: Kos, Greece

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