A novel linearization method is proposed for CMOS LNA design. The proposed LNA adopts two cascode FETs, one of which operates as a conventional current buffer delivering the fundamental current to the load and the other one works as a nonlinear current sinker absorbing the 3rd-order intermodulation distortion (IMD3) current generated by the common source FET. Both single-ended and differential structures are investigated at 2.14 GHz for WCDMA application. The simulation results shows that the single-ended LNA has an 18dBm IIP3 at 11.8 mW power consumption and the differential one has a 12dBm IIP3 at 24.3 mW power consumption