I. Introduction

An important component of data converters and digital communication systems is a sample-and-hold (S/H) or track-and-hold (T/H) stage, which often also has to provide a well-controlled gain. A key requirement of such stage is that it should be insensitive to the imperfections (finite gain, limited slew rate and bandwidth, nonlinearity, offset and 1/f noise) of the op-amps used. Past attempts to overcome these nonideal effects have been described in [1]–[5]. Each, however, has some shortcoming: the circuit of [1] requires an op-amp with high slew rate and fast settling; the circuit of [2] needs a large oversampling ratio, and hence a fast-settlingop-amp; and the wideband stages of [3] and [4] require a separate S/H to precede the amplifier. Finally, the stage described in [5] needs two op-amps, and both must have high gain. In [6], a T/H stage was proposed which was very robust with respect to op-amp imperfections. However, it could only provide unity gain during the valid (holding) phase. In this paper, a novel stage (based on a modification of the circuit described in [6]) is proposed. It offers the following advantages: 1.

It can provide a well-controlled gain of any value;

It suppresses the dc offset and 1/f noise of the op-amp;

It can operate in a wide frequency range, and does not require a large oversampling ratio;

It effectively squares the dc gain of the op-amp, and hence reduces its gain requirements;

Thanks to features 3. and 4., it is insensitive to the static nonlinearity of the op-amp.