We present an architecture and VLSI implementation of a distributed neural interface and spatio-temporal signal processor. The integrated neural interface records neural activity simultaneously on 256 voltage-mode channels. Each channel implements differential signal acquisition, amplification and band-pass filtering. An array of in-channel double-memory sample-and-hold cells stores two 16 /spl times/ 16 electronic images of distributed neural activity consecutively in time. A column-parallel double sampling circuit performs frame differencing in order to identify spatio-temporal neural activity patterns. A 3 mm /spl times/ 4.5 mm integrated prototype was fabricated in a 0.35 /spl mu/m CMOS technology. The functionality of the neural interface was experimentally demonstrated in extracellular in vitro recordings from the hippocampus of mice. The utility of the on-sensory-plane signal processor was validated in simulated wavefront detection performed on experimentally measured distributed neural activity recording.