Abstract:
We describe a multiple reference and multiple block size motion estimation (ME) hardware design for professional encoder LSIs, that supports H.264/AVC High 4:2:2 profile,...Show MoreMetadata
Abstract:
We describe a multiple reference and multiple block size motion estimation (ME) hardware design for professional encoder LSIs, that supports H.264/AVC High 4:2:2 profile, MPEG-2 4:2:2 profile and MPEG-4. An 8×8-based “telescopic” integer motion estimation (IME) followed by an “inclusive” variable block size fractional motion estimation (FME) results in a performance almost as good as the Joint Model (JM)’s exhaustive full search, while operation and control by two SIMD processors yield programmability and flexibility to motion search and mode decision methods. An encoder LSI with this architecture was successfully fabricated in a 90-nm CMOS process.
Date of Conference: 18-21 May 2008
Date Added to IEEE Xplore: 13 June 2008
ISBN Information: