Abstract:
In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquis...Show MoreMetadata
Abstract:
In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are −0.41/+0.38 and −0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 × 0.93 mm2, is determined by using TSMC 0.18µm 1P6M CMOS process.
Date of Conference: 24-27 May 2009
Date Added to IEEE Xplore: 26 June 2009
ISBN Information: