An area efficient digital amplitude modulator in 90nm CMOS | IEEE Conference Publication | IEEE Xplore

An area efficient digital amplitude modulator in 90nm CMOS

Publisher: IEEE

Abstract:

This paper presents a digital amplitude modulator (DAM) for polar transmitter in 90 nm CMOS technology. It consists of 255 basic cells digitally activated by an 8-bit amp...View more

Abstract:

This paper presents a digital amplitude modulator (DAM) for polar transmitter in 90 nm CMOS technology. It consists of 255 basic cells digitally activated by an 8-bit amplitude code to shape a non-constant envelope RF output. To reduce the aliases due to the discrete-time to continuous-time conversion a 2-fold interpolation has been implemented. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achieving -26.1 dB error vector magnitudes (EVM) and 18% drain efficiency. The 8-bit are segmented addressed. This results in a very compact 0.007 mm 2 chip area.
Date of Conference: 30 May 2010 - 02 June 2010
Date Added to IEEE Xplore: 03 August 2010
ISBN Information:

ISSN Information:

Publisher: IEEE
Conference Location: Paris, France

References

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