This paper investigates the sensitivity of continuous-time (CT) delta-sigma analog-to-digital converters (ADCs), candidate architectures for multi-standard and software-defined radio receivers, to feedback pulse-width jitter (PWJ) in presence of blocker signals received at the ADC input. A comparison between delta-sigma modulators with feedforward (FF) and feedback (FB) loop filter structures in terms of robustness to digital-to-analog converter (DAC) PWJ, in presence of blockers, is performed. Analysis and discussions developed in the paper are verified by CT simulations in Matlab/Simulink® and simulations results show good agreement with the theoretical expectations. It is shown that the PWJ induced errors due to out-of-band (OOB) blockers in the feedback path dominate the total in-band noise power (IBN) in FF delta-sigma structures and can cause a reduction in the achievable dynamic range that can be as large as 12 dB (2 bits of resolution) in case of using a non-return-to-zero DAC waveform. On the other hand, for same blocker levels at the modulator input, PWJ induced errors caused by OOB blockers have negligible contribution to the IBN in FB structures, owing to their stronger low-pass filtering characteristic and hence higher attenuation of OOB blockers.