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Dual VDD block based CMOS image sensor - preliminary evaluation | IEEE Conference Publication | IEEE Xplore

Dual VDD block based CMOS image sensor - preliminary evaluation


Abstract:

An image sensor with dual power supply of 1.8V and 1.1V is proposed. The sensor works on blocks of 8×8 pixels and the power supply for each block is selected according to...Show More

Abstract:

An image sensor with dual power supply of 1.8V and 1.1V is proposed. The sensor works on blocks of 8×8 pixels and the power supply for each block is selected according to the estimated variance inside the block. For the blocks with large variance, 1.8V is chosen to achieve high imaging performance; otherwise, 1.1V is used to save power. Preliminary evaluation of the imager performance based on simulations for TSMC 0.18 μm CMOS technology is given. The estimated amount of power saved by the proposed imager varies from image to image. Theoretically, up to 37% of power can be saved for images with predominant background, while no noticeable quality degradation of the reconstructed pictures after compression and decompression is perceived (PSNR reduced by less than 1.5 dB).
Date of Conference: 15-18 May 2011
Date Added to IEEE Xplore: 04 July 2011
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Conference Location: Rio de Janeiro, Brazil

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