GALS combined with Frequency Scaling has become a popular and effective technique in chip power reduction. However, frequency switching penalty and crossing-domain communication may be harmful to the performance of design. This paper proposes a Counter Based Variable Frequency Scaling (CB-VFS) scheme with zero latency for frequency switching. Based on CB-VFS, a Robust Instant-responding Ratiochronous Interface (RIRI) scheme is presented. Synchronous mechanisms are employed to simplify and justify the timing analysis. In particular, it has zero-latency crossing-domain penalty. Simulation results of a synthesizable RIRI scheme based memory system demonstrate its efficiency.