Recently significant research progress has been made toward the exact computation of symbolic transfer functions for large analog networks containing over 40 MOS transistors. A successful application of such a computation method for analog design requires an efficient method for ac-sensitivity analysis. It is addressed in this paper that the sensitivity of a transfer function to device sizes (or RC values) can be computed efficiently based on a hierarchical framework. It is demonstrated via examples that the ac-sensitivity can be used for improving the amplifier design metrics such as phase margin or pole/zero placement, etc.