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Integrator swing reduction in feedback compensated Sigma-Delta modulators | IEEE Conference Publication | IEEE Xplore

Integrator swing reduction in feedback compensated Sigma-Delta modulators


Abstract:

This paper describes a method to improve the linearity, area or SNR of feedback (FB) compensated Sigma-Delta (ΣΔ) modulators. These performance limiting factors are often...Show More

Abstract:

This paper describes a method to improve the linearity, area or SNR of feedback (FB) compensated Sigma-Delta (ΣΔ) modulators. These performance limiting factors are often related to the outer loop feedback DAC or to the 1st integrator of the ΣΔ-modulator in a FB-compensated modulator. This work focuses on improvements of the 1st integrator. The origin of these problems is the output swing of the 1st integrator, which includes and is dominated by the input signal. This problem is usually solved by increasing the capacitor size of this integrator, which results in an increased area and power. Another common solution is to use a feed-forward (FF) compensated ΣΔ-modulator, where basically only quantization noise is processed by the 1st integrator. However the drawback of this approach is a usually wide bandwidth and peaking of the modulator's signal transfer function (STF). The proposed solution greatly reduces signal swing at the 1st integrator, by not affecting the STF. Thus, it takes the advantages of the FF-topology, by keeping the advantages of the FB-topology.
Date of Conference: 19-23 May 2013
Date Added to IEEE Xplore: 01 August 2013
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Conference Location: Beijing, China

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