Unified approach for simulation of statistical reliability in nanoscale CMOS transistors from devices to circuits | IEEE Conference Publication | IEEE Xplore

Unified approach for simulation of statistical reliability in nanoscale CMOS transistors from devices to circuits


Abstract:

In this paper we will present integrated time dependent variability tool flow that links statistical TCAD simulations, statistical compact model extraction and statistica...Show More

Abstract:

In this paper we will present integrated time dependent variability tool flow that links statistical TCAD simulations, statistical compact model extraction and statistical circuit simulation. This allows the concepts of Design-Technology Co-Optimization (DTCO) to be extended into the reliability domain. The simulations are based on Gold Standard Simulations' (GSS) 3-D Kinetic Monte Carlo TCAD technology, which enables the simulation and analysis of the trapping/de-trapping history of large ensembles of microscopically different transistors. The results of the physical simulation are than captured in accurate time dependent statistical compact models. As a result, accurate statistical circuit simulation can trace the statistical impact of the degradation on the functionality of the underlying circuits and systems.
Date of Conference: 24-27 May 2015
Date Added to IEEE Xplore: 30 July 2015
Electronic ISBN:978-1-4799-8391-9

ISSN Information:

Conference Location: Lisbon, Portugal

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