This paper models and studies silicon-core coaxial through silicon vias (CTSVs), in which the metal via is replaced with a Cu coated silicon pole. Based on the physical structure of CTSVs, the impact of various design parameters on the electrical performance is investigated. It is shown that the high frequency loss of CTSVs is dominated by the dielectric and the increase in the thickness of plated Cu decreases the CTSV insertion loss. Furthermore, a set of analytical formulas are presented to capture the equivalent resistance-inductance-capacitance-conductance (RLCG) parameters of CTSVs, it yields accuracy results comparable to those with a commercial full-wave simulator. Finally, a comparison of the proposed CTSVs with other two TSV structures is carried out to demonstrate the feasibility of the silicon-core CTSVs in future three-dimensional (3D) integration.