Loading [a11y]/accessibility-menu.js
ESD Protection Design of High-Linearity SPDT CMOS T/R Switch for Cellular Applications | IEEE Conference Publication | IEEE Xplore

ESD Protection Design of High-Linearity SPDT CMOS T/R Switch for Cellular Applications


Abstract:

Electrostatic discharge (ESD) protection design for high-linearity single-pole double-throw (SPDT) transmit/receive switch (T/R switch) at 0.9/1.8 GHz GSM band was propos...Show More

Abstract:

Electrostatic discharge (ESD) protection design for high-linearity single-pole double-throw (SPDT) transmit/receive switch (T/R switch) at 0.9/1.8 GHz GSM band was proposed and verified in a standard 0.18-μm CMOS process. The SPDT CMOS T/R switch was implemented with body-floating technique, multi-stacked structure, and series-shunt topology to obtain low insertion loss, high power handling capability, and good isolation. With the proposed ESD protection design, the T/R switch can sustain human-body-model (HBM) ESD voltages of 3.5 kV under the positive-to-VSS stress and 5 kV under the negative-to-VSS stress. Experimental results including ESD characteristics, RF performance, and failure analysis are presented.
Date of Conference: 26-29 May 2019
Date Added to IEEE Xplore: 01 May 2019
Print ISBN:978-1-7281-0397-6
Print ISSN: 2158-1525
Conference Location: Sapporo, Japan

Contact IEEE to Subscribe

References

References is not available for this document.