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0.43nJ, 0.48pJ/step Second-Order ΔΣ Current-to-Digital Converter for IoT Applications | IEEE Conference Publication | IEEE Xplore

0.43nJ, 0.48pJ/step Second-Order ΔΣ Current-to-Digital Converter for IoT Applications


Abstract:

A second-order ΔΣ current-to-digital converter (CDC) for IoT sensing applications is presented in this paper. The proposed CDC uses pseudo-differential current-starved ri...Show More

Abstract:

A second-order ΔΣ current-to-digital converter (CDC) for IoT sensing applications is presented in this paper. The proposed CDC uses pseudo-differential current-starved ring oscillators as phase domain integrators. A negative feedback loop relaxes input ring oscillator nonlinearity. The proposed architecture does not require excess loop delay compensation or nonlinearity calibration. Digital differentiation using XOR implements an intrinsic first-order high-pass shaping of static element mismatch in the current steering digital-to-analog converter. A prototype CDC in 65nm CMOS process achieves 62dB dynamic range at 0.48pJ/conversion-step and has 20X better energy-efficiency than state-of-the-art.
Date of Conference: 26-29 May 2019
Date Added to IEEE Xplore: 01 May 2019
Print ISBN:978-1-7281-0397-6
Print ISSN: 2158-1525
Conference Location: Sapporo, Japan

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