Abstract:
In this paper, a low phase noise 28/38GHz dual-band cascaded PLL is designed with a dual-mode voltage controlled oscillator (VCO). The cascaded PLL consists of two stages...Show MoreMetadata
Abstract:
In this paper, a low phase noise 28/38GHz dual-band cascaded PLL is designed with a dual-mode voltage controlled oscillator (VCO). The cascaded PLL consists of two stages, where the 1st stage is a charge-pump PLL and the 2nd stage is a sub-sampling PLL. A quadrature dual-mode VCO is designed that is switchable in two frequency bands of 27.5–28.35GHz and 37–40GHz. The circuit is designed using a 130nm BiCMOS technology. The simulated phase noise is −110 and −115 dBc/Hz at 1MHz offset at 28GHz and 38GHz respectively.
Date of Conference: 12-14 October 2020
Date Added to IEEE Xplore: 28 September 2020
Print ISBN:978-1-7281-3320-1
Print ISSN: 2158-1525
Contents 