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A Stack-Based In-Pixel Storage Circuit for SPAD Photon Counting | IEEE Conference Publication | IEEE Xplore

A Stack-Based In-Pixel Storage Circuit for SPAD Photon Counting


Abstract:

Single-photon avalanche diodes (SPADs) have attracted a lot of attention these days because of the ability to detect a single photon for many emerging applications. Howev...Show More

Abstract:

Single-photon avalanche diodes (SPADs) have attracted a lot of attention these days because of the ability to detect a single photon for many emerging applications. However, planar SPAD sensor arrays often suffer from serious photon loss because the readout bottleneck dominates the overall dead time. This paper presents a stack-based in-pixel storage circuit for high-throughput SPAD imaging. The proposed circuit helps a SPAD imaging chip solve the buffer saturation problem and reduces its dead time by half compared to single-bit storage. Fabricated in TSMC HV 0.18\ \mu \mathrm{m} CMOS technology, each pixel in the SPAD array can record at most three photons in 50 ns, resulting in 40Mfps. The minimum integration time to form an 8-bit image is reduced to 6.4\ \mu \mathrm{s} while maintaining global shutter exposure.
Date of Conference: 21-25 May 2023
Date Added to IEEE Xplore: 21 July 2023
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Conference Location: Monterey, CA, USA

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