Abstract:
This paper proposes the design of a ternary inverter that uses low current as input voltage is VDD/2. When the supply voltage is set to 1 V, current supplied by a voltage...Show MoreMetadata
Abstract:
This paper proposes the design of a ternary inverter that uses low current as input voltage is VDD/2. When the supply voltage is set to 1 V, current supplied by a voltage source as an input voltage VDD/2 is reduced by 22.75% from 1.89μA to 1.46μA. By connecting ternary inverters back-to-back, a trit-storage element is implemented as a ternary SRAM cell. This paper also presents the first verification of read/write schemes that consider noise margins.
Date of Conference: 22-28 May 2021
Date Added to IEEE Xplore: 27 April 2021
Print ISBN:978-1-7281-9201-7
Print ISSN: 2158-1525
Contents 