FIR (Finite Impulse Response) filters are widely used in digital communication systems, digital image processing, and many other fields. A great deal of research has been done on the flexible configuration of FIR filters, particularly on the dynamic adjustment of coefficients and orders. Existing FIR filter structures can be configured to a higher-order filter for a lower-order use, leading to low hardware utilization. This paper presents a dynamically configurable architecture for FIR filters based on a novel architecture with systolic arrays and serial multiply accumulators (MACs). This design can be configured to a higher-order filter or to several independent lower-order filters, thus increasing utilization. We demonstrate a 2048-order FIR filter that can be configured to a minimum of 16 orders and a maximum of 128 channels using only 256 multipliers and adders.