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Design of a hardware-based discrete wavelet transform architecture for phoneme recognition | IEEE Conference Publication | IEEE Xplore

Design of a hardware-based discrete wavelet transform architecture for phoneme recognition


Abstract:

This paper presents the design of a digital hardware implementation based on Discrete Wavelet Transforms (DWTs) for the task of feature extraction in a multi-speaker phon...Show More

Abstract:

This paper presents the design of a digital hardware implementation based on Discrete Wavelet Transforms (DWTs) for the task of feature extraction in a multi-speaker phoneme recognition system. This is the first research where the design of a hardware-based DWT design is directed towards a speech recognition application. In the proposed architecture, the lifting-scheme approach employing the orthogonal Daubechies wavelet of order 5 was considered. The designed system was synthesised on a Xilinx Virtex-II XC2V3000 FPGA, and evaluated with the TIMIT corpus. This hardware-based DWT architecture is then intended to be implemented on a dedicated chip, along with the hardware implementation of the classification stage of the proposed phoneme recognition system, in order to further improve the resultant performance.
Date of Conference: 21-23 May 2014
Date Added to IEEE Xplore: 14 August 2014
Electronic ISBN:978-1-4799-2890-3
Conference Location: Athens, Greece

References

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