This paper proposes 0-1-A-A̅ LUT, a new programmable logic using atom switches, and a mapping algorithm for it. Atom switch is a non-volatile memory device of very small geometry which is fabricated between metal layers of a VLSI, and it can be used as a switch device that can hold its state. While considerable area reduction of Look Up Tables (LUTs) used in conventional Field Programmable Gate Arrays (FPGAs) has been achieved by simply replacing each SRAM element with a memory element using a pair of atom switches, our 0-1-A-A̅ LUT achieves further area reduction since number of inputs of a multiplexer (MUX) is reduced to a half. This is achieved by applying one of input signals to the switch array. Since the fanout of this input buffer depends on the mapped logic function, it is preferred to choose a logic function with fewer number of fanout in order to reduce delay. To avoid non-preferred functions to be mapped to 0-1-A-A̅ LUTs this paper also proposes a technology mapping algorithm. From our experiments, non-preferred functions are successfully excluded from mapping using our LUT, and the circuit depth using our k-LUT is 25% smaller in the best case compared with using the conventional (k - 1)-LUT which composed of a MUX of the same size as our k-LUT.