Abstract:
Virtual topologies simply the process of compiling assays to execute on digital microfluidic biochips (DMFBs). This paper evaluates the performance and cost of a virtual ...Show MoreMetadata
Abstract:
Virtual topologies simply the process of compiling assays to execute on digital microfluidic biochips (DMFBs). This paper evaluates the performance and cost of a virtual topology inspired by networks-on-chip (NoCs). The throughput of several deadlock-free droplet routing protocols is compared on synthetic traffic patterns that are widely used to evaluate semiconductor NoCs. The cost is the number of control pins required for actuation and the number of PCB layers required to route the chip; by eliminating unused pins, the virtual topology is cheaper than a direct-addressing DMFB, especially as chip size increases.
Date of Conference: 10-12 December 2014
Date Added to IEEE Xplore: 05 February 2015
Electronic ISBN:978-1-4799-4833-8
Print ISSN: 2325-0631