Spin-Transfer Torque RAM (STT-RAM) has read disturb error problems where read operations can flip bits in the cell. The problem is expected to become critical as the write current is being significantly reduced and becomes comparable to the read current. In this work, we propose a method called selective refresh which corrects read disturb errors and writes back the correct data only when the number of row activations reaches a threshold. We also propose a low cost implementation of selective refresh which keeps an activation counter table in the memory controller to avoid per-row counters in the memory. Experimental results show that the proposed method can significantly (by average 26.6% with an 8K entry table in case of read disturb error rate of 10-12) reduce the overhead of STT-RAM writes compared with the existing method that performs write-back on every row activation. The proposed method is expected to enable an important trade-off between the cost of cell reliability enhancement and write overhead in the STT-RAM design.