Abstract:
In this work, we present a long-range delay block for a wide range DLL supporting clock rates from 10MHz to 1GHz. The main contribution is a fast-locking scheme that quic...Show MoreMetadata
Abstract:
In this work, we present a long-range delay block for a wide range DLL supporting clock rates from 10MHz to 1GHz. The main contribution is a fast-locking scheme that quickly decides the control code of the delay block using a folded scheme. Post-layout simulation using a 90nm CMOS process has demonstrated that the locking time can he slashed dramatically.
Published in: 2018 International SoC Design Conference (ISOCC)
Date of Conference: 12-15 November 2018
Date Added to IEEE Xplore: 24 February 2019
ISBN Information:
Print on Demand(PoD) ISSN: 2163-9612