Abstract:
This paper presents a direct-conversion zero-IF receiver front-end circuit for 28-GHz 5G mobile communications. The RF receiver is composed of LNA, quadrature downconvers...Show MoreMetadata
Abstract:
This paper presents a direct-conversion zero-IF receiver front-end circuit for 28-GHz 5G mobile communications. The RF receiver is composed of LNA, quadrature downconversion mixer, wideband 50-ohm driving buffer, and I/Q generation LO buffer. The low-noise amplifier is designed in two-stage, in which the first cascode stage performs the single-to-differential conversion by using a transformer load. The mixer is a gilbert-cell active type. The 50-ohm driving buffer performs the differential-to-single conversion for test interface purpose. An external LO signal is fed to a RC polyphase filter, and splits into differential I/Q LO signals. Designed in 65nm CMOS process, extensive electromagnetic simulations after chip layout are carried out to evaluate the performances. The full receiver dissipates 90 mW from a 1.2-V supply. The Rx full-path gives the gain of +27.4 dB, noise figure of 4.6 dB, 1-dB input compression point of -38 dBm, and the baseband channel bandwidth of 1 GHz. The die size is 2 mm2 including RF pads.
Published in: 2019 International SoC Design Conference (ISOCC)
Date of Conference: 06-09 October 2019
Date Added to IEEE Xplore: 09 March 2020
ISBN Information:
Print on Demand(PoD) ISSN: 2163-9612