Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks | IEEE Conference Publication | IEEE Xplore

Design of a CMOS Current-mode Squaring Circuit for Training Analog Neural Networks


Abstract:

We propose a new current mode CMOS squaring circuit which directly yields the square term. The proposed squaring circuit was designed in a standard with 0.18 μm CMOS tech...Show More

Abstract:

We propose a new current mode CMOS squaring circuit which directly yields the square term. The proposed squaring circuit was designed in a standard with 0.18 μm CMOS technology. The designed chip occupies a chip area of 408μm × 197μm and consumes a power of 3.6mW. The proposed squaring circuit can be used in current mode applications as in analog neurons.
Date of Conference: 21-24 October 2020
Date Added to IEEE Xplore: 01 February 2021
ISBN Information:
Print on Demand(PoD) ISSN: 2163-9612
Conference Location: Yeosu, Korea (South)

Funding Agency:


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