Abstract:
This paper presents a leakage current suppressed (LCS) technique for high-speed bootstrapped switch. Compared with the conventional one, the proposed behaves better linea...Show MoreMetadata
Abstract:
This paper presents a leakage current suppressed (LCS) technique for high-speed bootstrapped switch. Compared with the conventional one, the proposed behaves better linearity and lower leakage current during hold phase. Designed in a 28 nm CMOS process, the proposed bootstrapped switch exhibits a more than 70 times leakage current reduction. The SFDR is improved by more than 10 dB at a wide range of input frequency.
Published in: 2021 18th International SoC Design Conference (ISOCC)
Date of Conference: 06-09 October 2021
Date Added to IEEE Xplore: 25 November 2021
ISBN Information:
Print on Demand(PoD) ISSN: 2163-9612