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Network-on-Chip-Centric Accelerator Architectures for Edge AI Computing | IEEE Conference Publication | IEEE Xplore

Network-on-Chip-Centric Accelerator Architectures for Edge AI Computing


Abstract:

In this paper, we present a Network-on-Chip-centric (NoC-centric) design technique for edge AI accelerator architectures. The technique enables NoC with compute capabilit...Show More

Abstract:

In this paper, we present a Network-on-Chip-centric (NoC-centric) design technique for edge AI accelerator architectures. The technique enables NoC with compute capability, eliminates the need of using extra cores or frequent access to memory for neural network computing and eventually improves accuracy and energy efficiency. We demonstrate the dedicated, software-configurable NoCs with on-device inference and training tasks and show the architectures can achieve 2.8x and 2.1x lower energy per classification compared to state-of-the-art baselines, respectively.
Date of Conference: 19-22 October 2022
Date Added to IEEE Xplore: 07 February 2023
ISBN Information:
Print on Demand(PoD) ISSN: 2163-9612
Conference Location: Gangneung-si, Korea, Republic of

References

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