This next generation of Chip Multithreaded (CMT) SPARC SoC processor, code named Rainbow Falls, doubles on-chip thread count over its predecessor the UltraSparc T2+. The chip offers high levels of integration and scalability with twice the number of cores, a larger L2 cache, and higher maximum I/O bandwidth, within the same power envelope. Sixteen 8-threaded enhanced SPARC cores (SPC) provide 128 threads in a single die, delivering the highest thread count for a general-purpose microprocessor. The new cache coherency further allows up to 4-way glueless systems with a total of 512 threads. Each core communicates with the unified 6MB L2 cache through a crossbar (CCX) delivering 461GB/s (Fig. 5.2.1). A gasket (CXG) is also introduced to manage the congestion and synchronization of the massive interconnect between the 16 cores and the crossbar. This facilitates a synchronized delay control between any core and any L2 bank for partial core product binning and testing.