Abstract:
The constant demand for wireless systems pushes engineers and researchers to develop more innovative systems to improve performance. Remarkable improvements have been rec...Show MoreMetadata
Abstract:
The constant demand for wireless systems pushes engineers and researchers to develop more innovative systems to improve performance. Remarkable improvements have been recently realized on charge-domain SAR ADCs to reach the speed of a few tens of MS/s with medium resolution and low power consumption [1,2]. This has shifted the power bottleneck to the preceding block in a wireless receiver, conventionally the Variable-Gain Amplifier (VGA) that has to charge a few pF of ADC sampling capacitor with rail-to-rail voltage within a few ns with 10b linearity.
Published in: 2012 IEEE International Solid-State Circuits Conference
Date of Conference: 19-23 February 2012
Date Added to IEEE Xplore: 03 April 2012
ISBN Information: