In IoT sensor applications, capacitive sensors are widely used to convert various capacitances into digital signals, and the demand for power-efficient high-resolution capacitance-to-digital converters (CDCs) is on the rise. In a high-resolution CDC, kT/C noise, due to the sampling process, becomes dominant in discrete-time systems [1–3], especially in the sub-fF sensor fields. $\Delta \Sigma$ architectures averaging kT/C noise with a high oversampling rate require extended conversion time (~ms) and degraded power efficiency (~pJ/conv.step). The CT $\Delta\Sigma$ CDC implemented in [4] eliminates the sampling-induced kT/C noise, but it loses frequency scalability and relies heavily on static high-gain analog components.