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Topology design for global link optimization in application specific network-on-chips | IEEE Conference Publication | IEEE Xplore

Topology design for global link optimization in application specific network-on-chips


Abstract:

A new algorithm for application-specific network-on-chip design and optimization is presented. The algorithm uses packet-scheduling and traffic modelling concepts to esti...Show More

Abstract:

A new algorithm for application-specific network-on-chip design and optimization is presented. The algorithm uses packet-scheduling and traffic modelling concepts to estimate the degree of interaction of several communication channels (congestion) on a given design. It is implemented as part of a network design software package that includes other optimization criteria, like power consumption and reliability.
Date of Conference: 16-18 November 2004
Date Added to IEEE Xplore: 04 April 2005
Print ISBN:0-7803-8558-6
Conference Location: Tampere, Finland

References

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