High speed and low power on-chip micro network circuit with differential transmission line | IEEE Conference Publication | IEEE Xplore

High speed and low power on-chip micro network circuit with differential transmission line


Abstract:

This work presents a high speed and low power on-chip micro network circuit with differential transmission line for seamless intra- and inter-chip communication. A 4 Gbps...Show More

Abstract:

This work presents a high speed and low power on-chip micro network circuit with differential transmission line for seamless intra- and inter-chip communication. A 4 Gbps pulse signal transmission was confirmed and an 8 Gbps pulse signal was confirmed at the receiver circuit in 0.35 /spl mu/m and 0.18 /spl mu/m CMOS process technologies, respectively. It is expected that over 10 Gbps signal transmission can be achieved by using sub-100 nm CMOS technologies. From the simulated results, the RLC differential transmission line is faster and has lower power consumption than the RC line.
Date of Conference: 16-18 November 2004
Date Added to IEEE Xplore: 04 April 2005
Print ISBN:0-7803-8558-6
Conference Location: Tampere, Finland

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