Lowering the error floor of double-binary turbo codes: The flip and check algorithm | IEEE Conference Publication | IEEE Xplore

Lowering the error floor of double-binary turbo codes: The flip and check algorithm


Abstract:

This article addresses the error floor reduction of double-binary turbo codes. The proposed approach is an extension of a low complexity method originally proposed for de...Show More

Abstract:

This article addresses the error floor reduction of double-binary turbo codes. The proposed approach is an extension of a low complexity method originally proposed for decoding binary turbo codes. This method's interest is that it does not need to modify the turbo coding scheme as long as an error detection code is serially concatenated with the turbo code. Simulation results showed that error rate performance gains can reach one order of magnitude in the cases of the DVB-RCS and DVB-RCS2 standards, while keeping a well-handled computational complexity.
Date of Conference: 05-09 September 2016
Date Added to IEEE Xplore: 20 October 2016
ISBN Information:
Electronic ISSN: 2165-4719
Conference Location: Brest, France

References

References is not available for this document.