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High performance FPGA based elliptic curve cryptographic co-processor | IEEE Conference Publication | IEEE Xplore
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High performance FPGA based elliptic curve cryptographic co-processor


Abstract:

A high performance elliptic curve coprocessor is developed, which is optimized for a binary field recommended by NIST. The architecture uses a field multiplier capable of...Show More

Abstract:

A high performance elliptic curve coprocessor is developed, which is optimized for a binary field recommended by NIST. The architecture uses a field multiplier capable of performing a field multiplication over the extension field with degree 163 in 0.060 /spl mu/sec. The coprocessor uses Lopez and Dahab's projective coordinate system and is optimized specifically for Koblitz curves. An efficient implementation of Itoh and Tsujii's method for inversion with performance comparable to the extended Euclidean algorithm is used. A prototype of the processor has been implemented for the binary extension field with degree 163 on a Xilinx XCV2000E FPGA. The prototype runs at 66 MHz and performs an elliptic curve scalar multiplication in 0.233 msec on a generic curve and 0.075 msec on a Koblitz curve.
Date of Conference: 05-07 April 2004
Date Added to IEEE Xplore: 24 August 2004
Print ISBN:0-7695-2108-8
Conference Location: Las Vegas, NV, USA

References

References is not available for this document.