Large-integers are integers with bit-size larger than 64 and mainly used in cryptography and computational alegbra. Large-integers arithmetic is constantly changing resulting in continuous new hardware implementations where operations are generally in multi-level within the same design. One of the shortcomings of hardware description languages libraries is their lack of support for large-integer's functions. This paper presents a high-level simulation-based platform dedicated to verify large-integer hardware designs in multi-level and without bit-size restriction.