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LC PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS | IEEE Journals & Magazine | IEEE Xplore

LC PLL With 1.2-Octave Locking Range Based on Mutual-Inductance Switching in 45-nm SOI CMOS


Abstract:

A wideband LC PLL in 45-nm SOI CMOS technology is presented that has a center frequency of 12.4 GHz and 1.2 octave locking range. The wideband operation is achieved by sw...Show More

Abstract:

A wideband LC PLL in 45-nm SOI CMOS technology is presented that has a center frequency of 12.4 GHz and 1.2 octave locking range. The wideband operation is achieved by switching mutual inductances within the inductor coil of the LC oscillator. To minimize resistive switching losses, the inductor coil consists of a non-switchable primary coil and two isolated secondary coils with series switches. When the switches are closed, the overall inductance reduces because of the switched mutual inductances. Three inductor bands, each consisting of 16 switched capacitor sub-bands, span a frequency range from 7.3 to 17.5 GHz. The in-band phase noise measured after a 1/4 divider is better than -107 dBc/Hz at 1 MHz offset frequency in the entire locking range. The PLL is fully differential and its core has a power consumption of 25 mW at the highest oscillation frequency.
Published in: IEEE Journal of Solid-State Circuits ( Volume: 44, Issue: 2, February 2009)
Page(s): 436 - 449
Date of Publication: 27 January 2009

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