This paper presents a low-power mixed-signal adaptive 60 GHz baseband in 65 nm CMOS. The design integrates variable gain amplifiers, analog phase rotator, 40-coefficient I/Q decision feedback equalizers (DFEs), clock generation and data recovery circuits, and adaptation hardware. The baseband achieves 10 Gb/s operation with BER <; 10^-12 while consuming 53 mW (adaptation on)/45 mW (adaptation off), of which the core signal processing circuits consume only 29 mW.