The first feedforward continuous-time ΔΣ ADC with a finite impulse response (FIR) DAC is presented for consumer radio applications. It provides robust loop-delay compensation with no performance degradation in the presence of radio out-of-band blockers from either out-of-band gain peaking in the signal transfer function or blocker clock-jitter modulation. A half-clock-period-delay half-return-to-open FIR DAC minimizes intersymbol interference with 3 dB less noise. At 20/30/40 MHz operation, the figure-of-merit (FOM) is less than or equal to 36 fJ/conv.-step. At 10 MHz operation, the FOM is 50 fJ/conv.-step. The equivalent FOM for a 20 MHz-only design is 28 fJ/conv.-step. It occupies 0.0194 mm² in 40 nm CMOS and is the smallest wideband ADC ever reported.